1. Field of the Invention
The invention relates to a voltage converter in which active components are embedded in (incorporated in, built in) a substrate.
2. Description of the Related Art
A non-insulated step-down DC-DC converter is an example of a voltage converter which is used in an active component mounted on an electronic device. FIG. 20 shows a configuration of a basic circuit of such a non-insulated step-down DC-DC converter. Here, when it is assumed that the input voltage of the non-insulated step-down DC-DC converter is Vin, the output voltage thereof is Vout, and the load resistance thereof is Rload, the state equation of this circuit is expressed by Equation 1 below.
                    [                  Equation          ⁢                                          ⁢          1                ]                                                                      (                                                                                          ⅆ                                          ⅆ                      t                                                        ⁢                                      i                    out                                                                                                                                            ⅆ                                          ⅆ                      t                                                        ⁢                                      V                    out                                                                                )                =                                            (                                                                                          -                                                                        R                          s                                                L                                                                                                                        -                                              1                        L                                                                                                                                                        1                      C                                                                                                  -                                              1                                                  CR                          load                                                                                                                                )                        ⁢                          (                                                                    i                                                                                                              V                      out                                                                                  )                                +                      D            ×                          (                                                                                          1                      L                                                                                                            0                                                              )                        ×                          V              in                                                          (        1        )            
In Equation 1, Rs is the sum of the ON resistance of a switch PMOS or NMOS and the DC resistance of an inductor L, and D is the proportion (time ratio) of ON-time to a switching cycle.
In this case, in a steady state where the output voltage of the non-insulated step-down DC-DC converter is stable, since the values of the left matrix components in Equation 1 become 0, if Rs is assumed to have a value so small as to be negligible, an average output current iout and an average output voltage Vout satisfy relational equations as expressed by Equations 2 and 3 below.
                    [                  Equation          ⁢                                          ⁢          2                ]                                                                      i          out                =                              D                          R              load                                ⁢                      V            in                                              (        2        )                                [                  Equation          ⁢                                          ⁢          3                ]                                                                      V          out                =                  D          ×                      V            in                                              (        3        )            
Moreover, when the switching frequency of the switch is f, a ripple current ΔiL of the inductor L in the OFF period of the switch PMOS is expressed by Equations 4 and 5 below.
                    [                  Equation          ⁢                                          ⁢          4                ]                                                                                  ⅆ                          ⅆ              t                                ⁢                      i            out                          =                                            -                              1                L                                      ⁢                          V              out                                =                                    -                              D                L                                      ⁢                          V              in                                                          (        4        )                                [                  Equation          ⁢                                          ⁢          5                ]                                                                      ∴                      Δ            ⁢                                                  ⁢                          i              L                                      =                              D            ×                                          T                off                            L                        ⁢                          V              in                                =                                    D              ⁡                              (                                  1                  -                  D                                )                                      ⁢                                          V                in                            Lf                                                          (        5        )            
In the ON period of the switch PMOS, the same equation as Equation 5 is satisfied for the ripple current ΔiL of the inductor L. Therefore, the current flowing into the inductor L has a triangular waveform in which peaks appear in a constant output current.
Moreover, an output ripple voltage ΔVout can be calculated from the amount of charge stored in an output-side capacitor (condenser) Cout and is expressed by Equation 6 below.
                    [                  Equation          ⁢                                          ⁢          6                ]                                                                      Δ          ⁢                                          ⁢                      V            out                          =                                            Δ              ⁢                                                          ⁢              Q                                      C              out                                =                                                    1                                  C                  out                                            ×                              1                2                            ×                              T                2                            ×                                                Δ                  ⁢                                                                          ⁢                                      i                    L                                                  2                                      =                                                                                T                    ×                                          T                      off                                                                            8                    ⁢                                                                                  ⁢                                          C                      out                                        ⁢                    L                                                  ⁢                                  V                  in                                            =                                                                    D                    ⁡                                          (                                              1                        -                        D                                            )                                                                            8                    ⁢                                                                                  ⁢                                          C                      out                                        ⁢                                          Lf                      2                                                                      ⁢                                  V                  in                                                                                        (        6        )            
The output ripple voltage ΔVout also has a triangular waveform in which peaks appear in a constant output voltage similarly to the waveform of the ripple current ΔiL of the inductor. In this case, the output waveform of the output ripple voltage ΔVout can be controlled so as to approach substantially an ideal triangular waveform by decreasing the inductance of the inductor L and increasing the switching frequency f (i.e., decreasing the switching cycle T). That is, it is possible to decrease the amplitude (peak-to-peak) of the triangular waveform.
In recent years, devices in which such a voltage converter and active components including the same are mounted are increasingly being manufactured as device modules. In particular, there is an increasing demand for making such modules smaller and thinner. To cope with such a demand, for example, Patent Document 1 discloses a micro converter in which output stud terminals having a greater height than an active component are provided on a substrate having the active component mounted thereon, and the micro inductor is provided on the output stud terminals so that the active component and the micro inductor are arranged to be mounted in the direction vertical to the substrate surface.    Patent document 1: Japanese Unexamined Patent Publication No. 2004-63676
In the non-insulated step-down DC-DC converter described above, in order, to prevent a shoot-through current (a flow-through current) occurring in the circuit due to simultaneous turning ON of the two switches PMOS and NMOS, the switching timings of the two switches PMOS and NMOS are controlled so that they do not occur at the same time. However, although the occurrence of the shoot-through current can be prevented by controlling the switching timings in such a manner, another problem may be caused. That is, high-frequency noise may be generated in a period (turn-OFF period) in which the respective switches PMOS and NMOS perform switching.
For example, in the non-insulated step-down DC-DC converter shown in FIG. 20, when the second switch NMOS turns OFF, a parasitic diode (so-called internal diode between the source and the drain) D2 included in the second switch NMOS continuously supplies a voltage to the output-side components including the inductor L, the output-side capacitor (condenser) Cout, and the switch NMOS. Therefore, a voltage is applied to the parasitic diode D2, whereby charge is stored in a parasitic capacitor Cp2 which is equivalently included in the switch NMOS. In such a state, when the first switch PMOS is opened, the charge stored in the second switch NMOS is discharged to the input-side components including the input-side capacitor (condenser) Cin and the switches PMOS and NMOS. At that time, the parasitic capacitor Cp2 included in the second switch NMOS resonates with a parasitic inductor ESL included in the input-side capacitor (condenser) Cin. As a result, high-frequency noise is generated (however, the generation mechanism is not limited to this).
The high-frequency noise generated by such a mechanism is radiated (unnecessarily radiated) to the outside, and such spurious radiation may cause problems in the operation of surrounding devices or communication jamming between the surrounding devices and may propagate through a floating capacitance of the inductor L or the ground to appear in the output voltage. However, at present, substantially no countermeasures have been taken against the high-frequency noise in the modules mounting the voltage converter of the related art.
In addition, the use of a configuration in which electrical connection positions between the components of a voltage converter are decreased further, or a wire-to-wire distance is decreased further is generally difficult from the perspective of designing a wiring substrate on which the voltage converter is mounted. Moreover, even when such a design is employed, there is a possibility that it may increase various other noise components including high-frequency noise.